Introduction to ARM Cortex-M4

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By iLabTek Team

April 2026

15 min read

Beginner

Introduction

The ARM Cortex-M4 is a 32-bit processor that has become the industry standard for embedded systems and microcontroller applications. It's widely used in devices ranging from simple IoT sensors to complex real-time control systems. Understanding the Cortex-M4 architecture is fundamental for anyone working with modern embedded systems.

What You'll Learn

This tutorial covers the Cortex-M4 architecture, memory organization, register structure, and the essential instruction set fundamentals needed to program these powerful microcontrollers.

What is ARM Cortex-M4?

The ARM Cortex-M4 is a 32-bit RISC (Reduced Instruction Set Computer) processor core designed for embedded applications. It combines performance with power efficiency, making it ideal for battery-operated IoT devices and real-time control applications.

Key Features

32-bit Architecture: Processes data in 32-bit chunks for better performance
Harvard Memory Architecture: Separate instruction and data buses for improved throughput
Floating Point Unit (FPU): Hardware support for single-precision floating-point operations
Thumb-2 Instruction Set: Mixed 16-bit and 32-bit instructions for efficiency
Nested Vector Interrupt Controller (NVIC): Efficient interrupt handling mechanism
Low Power Mode: Multiple sleep modes for power optimization
DMA Controller: Direct memory access for autonomous data transfer

Cortex-M4 Architecture Overview

The ARM Cortex-M4 is built on a modern microarchitecture that emphasizes simplicity, efficiency, and determinism. Let's explore its key architectural components:

ARM Cortex-M4 Block Diagram

CPU Core

FPU

NVIC

Memory Bus

DMA

Peripherals

Block diagram showing main components of Cortex-M4

Core Components

CPU Core

The main processing unit that executes instructions. It uses a pipeline architecture with multiple stages for efficient instruction execution.

Floating Point Unit (FPU)

Dedicated hardware for floating-point calculations, significantly faster than software emulation for mathematical operations.

Nested Vector Interrupt Controller (NVIC)

Manages interrupt priority levels, reduces interrupt latency, and handles up to 240 external interrupts on most devices.

Memory Organization

Understanding memory organization is crucial for embedded systems programming. The Cortex-M4 uses a unified memory system with the following layout:

Address Range	Memory Type	Size	Purpose
0x00000000 - 0x1FFFFFFF	Code Space	512 MB	Program instructions (Flash)
0x20000000 - 0x3FFFFFFF	SRAM	512 MB	Stack, heap, and data variables
0x40000000 - 0x5FFFFFFF	Peripheral	512 MB	I/O and peripheral registers
0x60000000 - 0x7FFFFFFF	External RAM	512 MB	External memory devices
0xE0000000 - 0xFFFFFFFF	System	512 MB	Cortex-M4 system including NVIC

Memory Types

Flash Memory: Non-volatile memory where your program instructions are stored. Typical sizes range from 64KB to 2MB depending on the specific microcontroller.

SRAM: Volatile memory used for variables, stack, and heap. Typical sizes range from 8KB to 1MB.

Registers: Ultra-fast memory directly accessible by the CPU, used for temporary data storage during instruction execution.

CPU Registers

The ARM Cortex-M4 has 16 general-purpose 32-bit registers. Here's an overview of the most important ones:

R0-R12  : General Purpose Registers (GPRs)
R13 (SP): Stack Pointer - points to the top of the stack
R14 (LR): Link Register - stores return address for functions
R15 (PC): Program Counter - points to current instruction
PSR     : Program Status Register - stores condition flags
                            

Register	Alternative Name	Purpose
R0-R3	Argument/Result	Function arguments and return values
R4-R11	Local Variables	Local variable storage
R12	IP (Intra-procedure)	Temporary storage
R13	SP (Stack Pointer)	Top of the stack
R14	LR (Link Register)	Return address for functions
R15	PC (Program Counter)	Current instruction address

Instruction Set Fundamentals

The ARM Cortex-M4 uses the Thumb-2 instruction set, which combines 16-bit and 32-bit instructions for optimal code density and performance.

Instruction Categories

Arithmetic Instructions: ADD, SUB, MUL, DIV for mathematical operations
Logical Instructions: AND, ORR, EOR, BIC for bitwise operations
Load/Store Instructions: LDR, STR for memory access
Branch Instructions: B, BL, BX for control flow
Comparison Instructions: CMP, TST for conditional execution
System Instructions: SWI, MRS, MSR for system control

Instruction Syntax

MNEMONIC{S}{cond} Rd, Rn, operand

Where:
- MNEMONIC : The instruction name (MOV, ADD, etc.)
- S         : Optional flag update (sets condition codes)
- cond      : Optional condition code (EQ, NE, LT, GT, etc.)
- Rd        : Destination register
- Rn        : First source register
- operand   : Second operand (register or immediate value)
                            

Common Instructions

MOV R0, #0x10       ; Move immediate value 0x10 to R0
ADD R1, R2, R3       ; Add R2 + R3, store in R1
LDR R0, [R1]         ; Load value from address in R1 to R0
STR R0, [R1]         ; Store R0 to address in R1
BL function_name     ; Branch with Link to function
CMP R0, R1           ; Compare R0 and R1
                            

Condition Codes

ARM instructions can execute conditionally based on flags set by comparison operations. Common conditions include: EQ (Equal), NE (Not Equal), LT (Less Than), GT (Greater Than), LE (Less or Equal), GE (Greater or Equal).

Practical Code Examples

Example 1: Simple Variable Assignment

// C Code
int x = 10;
int y = 20;
int z = x + y;

// Assembly Equivalent
MOV  R0, #10        ; Load 10 into R0
MOV  R1, #20        ; Load 20 into R1
ADD  R2, R0, R1     ; Add R0+R1, store in R2
                            

Example 2: Function Call

// C Code
int add(int a, int b) {
    return a + b;
}
int result = add(5, 3);

// Assembly Equivalent
MOV  R0, #5         ; First argument in R0
MOV  R1, #3         ; Second argument in R1
BL   add            ; Branch with Link to add function
; Return value is in R0
                            

Example 3: Loop Structure

// C Code
int sum = 0;
for(int i = 0; i < 10; i++) {
    sum += i;
}

// Assembly Equivalent
MOV  R0, #0         ; sum = 0
MOV  R1, #0         ; i = 0
loop:
CMP  R1, #10        ; Compare i with 10
BGE  end            ; If i >= 10, jump to end
ADD  R0, R0, R1     ; sum += i
ADD  R1, R1, #1     ; i++
B    loop            ; Jump back to loop
end:
; Result in R0
                            

Conclusion

The ARM Cortex-M4 is a powerful and efficient processor that serves as the foundation for countless embedded systems. By understanding its architecture, memory organization, and instruction set fundamentals, you're well-equipped to begin developing efficient embedded applications.

Key takeaways from this tutorial:

The Cortex-M4 is a 32-bit RISC processor with built-in floating-point support
Memory is organized into distinct regions: Code, SRAM, Peripherals, and System
The processor has 16 registers with specific purposes defined by the calling convention
The Thumb-2 instruction set provides a good balance between code density and performance
Understanding instruction execution is crucial for efficient embedded programming

Next Steps

Now that you understand the basics of ARM Cortex-M4, consider exploring STM32CubeIDE and hands-on programming with development boards to apply these concepts in real-world projects.

Introduction to ARM Cortex-M4

Introduction

What is ARM Cortex-M4?

Key Features

Cortex-M4 Architecture Overview

Core Components

CPU Core

Floating Point Unit (FPU)

Nested Vector Interrupt Controller (NVIC)

Memory Organization

Memory Types

CPU Registers

Instruction Set Fundamentals

Instruction Categories

Instruction Syntax

Common Instructions

Practical Code Examples

Example 1: Simple Variable Assignment

Example 2: Function Call

Example 3: Loop Structure

Conclusion

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